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| foundry:start [2012/02/18 21:20] – [Shanghai Hua Hong NEC Electronics Company, Ltd.] mcmaster | foundry:start [2025/11/17 23:53] (current) – mcmaster | ||
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| A foundry is an IC fabrication facility. | A foundry is an IC fabrication facility. | ||
| - | ====== austriamicrosystems (AMS) ====== | + | This page lists all known foundries regardless of whether they are internal-only or offer their services to the public. |
| - | Processes | + | ====== List of foundries ====== |
| - | C18 @ 0.18 µm | + | |
| - | H18 @ 0.18 µm | + | |
| - | C35B4C3 @ 0.35 µm | + | |
| - | C35B4M3 @ 0.35 µm | + | |
| - | C35B4O1 @ 0.35 µm | + | |
| - | H35B4D3 @ 0.35 µm | + | |
| - | S35D4 @ 0.35 µm | + | |
| - | ====== BAE Systems ====== | + | {{topic> |
| - | BAE Systems Information and Electronic Systems Integration, | + | ====== Foundry ID (FIXME: clean up) ====== |
| - | BAE Systems Micrwave Electronics Center Nashua (Nashua, NH) | + | |
| - | ====== Chartered Semiconductor Manufacturing (CSM) ====== | + | Device vendors concerned about reverse engineering often use simple tricks to make it harder to put a BOM together. One of these is to remove the labeling from, or even re-label with a laser engraver, various ICs on the board. Re-labeling can also be done for brand reasons. |
| - | Acquired by Global Foundries | + | The first step in identifying an unknown components is to determine the vendor. If there' |
| - | 0.13 µm | + | |
| - | 300 mm wafers | + | |
| - | Dongbu | + | This page is a library of specific process examples, not a place to discuss general fabrication techniques. General fab topics belong on the [[siliconprawn> |
| - | 90 nm to 0.35 um | + | |
| - | " | + | |
| - | ====== | + | ====== |
| - | Processes | + | Although only present on smaller (<=350nm typically) process technology, CMP fill patterns are distinctive enough that a pretty good guess of the vendor can sometimes be obtained from the fill pattern alone. |
| - | * 28nm | + | |
| - | * 40nm | + | |
| - | * 65nm | + | |
| - | * 0.13um/ | + | |
| - | * 0.18um | + | |
| - | * 0.35um | + | |
| - | ===== Fab 1 - Dresden, Germany ===== | + | All images shown are top metal with overglass intact, unless otherwise labeled. |
| - | * "45nm and below" | + | Please try to include scale bars in all images. |
| - | * 300 mm wafer | + | ===== Actel ===== |
| - | ===== Fab 2 - Singapore ===== | + | {{: |
| - | * 0.6- to 0.35-micron | + | ===== Adaptec ===== |
| - | * 200 mm wafer | + | |
| - | ===== Fab 3/5 - Singapore ===== | + | {{: |
| - | * 0.35-micron to 0.18-micron | + | ===== ATI radeon ===== |
| - | * 200 mm wafer | + | |
| + | {{: | ||
| - | ===== Fab 3E - Singapore | + | ===== Atmel ===== |
| - | * 0.18-micron | + | ==== 350nm aluminum ==== |
| - | * 200 mm wafer | + | |
| - | ===== Fab 6 - Singapore ===== | + | FIXME: get a picture with a scale bar |
| - | * 0.18- to 0.11-micron | + | The fill pattern is very distinctive and looks like a "brick wall" |
| - | * 200 mm wafer | + | |
| - | ===== Fab 7 - Singapore ===== | + | {{: |
| - | 0.13-micron to 40nm | + | (image copyright Christopher Tarnovsky, originally published on [[http:// |
| - | ===== Fab 8 - Saratoga County, NY ===== | + | ===== Cisco Systems |
| - | 28nm and below | + | {{: |
| - | ====== Grace Semiconductor ====== | + | IBM logo on chip. Am100x objective? |
| - | Processes | + | ===== FTDI ===== |
| - | * 0.25 um | + | |
| - | * 0.18 um | + | |
| - | * 0.16 um | + | |
| - | * 0.15 um | + | |
| - | * 0.14 um | + | |
| - | * 0.13 um | + | |
| - | * 0.115 um | + | |
| - | ====== He Jian Technology Corporation (HJTC) ====== | + | {{: |
| - | Processes | + | ===== Microchip ===== |
| - | * 0.18 um | + | |
| - | * 0.25 um | + | |
| - | * 0.35 um | + | |
| - | * 8" and 200 mm wafers | + | |
| - | ====== Honeywell ====== | + | ==== 350nm aluminum |
| - | Honeywell Aerospace Plymouth (Plymouth, MN) | + | Example image from PIC12F683. Overglass generally appears deep red to orange, CMP fill is long straight lines. |
| - | HRL Labratories LLC | + | {{: |
| - | Malibu, CA | + | ==== 250nm copper ==== |
| - | ====== IBM ====== | + | The exact geometry of this process isn't known but it's copper damascene and significantly smaller than the 350. |
| - | Main article | + | Example image from ENC424J600. Overglass appears orange to yellow. CMP fill is short lines. |
| - | ====== Intersil Corporation ====== | ||
| - | Palm Bay. FL | + | {{: |
| - | ====== MagnaChip ====== | + | ==== pic32mx695f |
| - | Processes | + | {{: |
| - | * 0.5 um | + | |
| - | * 0.35 um | + | |
| - | * 0.30 / 0.25 um | + | |
| - | * 0.18 / 0.16 um | + | |
| - | * 0.15 um | + | |
| - | * 0.13 / 0.11 um | + | |
| - | * 90 nm | + | |
| + | ===== Myricom ===== | ||
| - | ====== National Semiconducdtor Corporation ====== | + | {{: |
| - | * South Portland, ME | + | ===== NXP / Philips ===== |
| - | * 0.65 um to 0.13 um | + | |
| - | * CMOS and BiCMOS with SOI, SiGe, and Hi Voltage | + | |
| - | * Ability to add unique number generator to ID individual dies: 256 bit | + | |
| - | ====== NEC ====== | + | ==== Unknown geometry, possibly 220nm ==== |
| - | ===== Shanghai Hua Hong NEC Electronics Company, Ltd. ===== | + | Fill pattern is large square patches of metal with spaces between them. |
| - | * 1 um | + | {{: |
| - | * 0.5 um | + | |
| - | * 0.45 um | + | |
| - | * 0.35 um | + | |
| - | * 0.3 um | + | |
| - | * 0.25 um | + | |
| - | * 0.18 um | + | |
| - | * 0.162 um | + | |
| - | * 0.16 um | + | |
| - | * 0.13 um | + | |
| - | ====== Silterra Malaysia Sdn. Bhd. ====== | + | ===== Sysmocom |
| - | Processes | + | {{: |
| - | * 0.13µm | + | |
| - | * 0.18µm | + | |
| - | * 0.22µm | + | |
| - | ====== Semiconductor Manufacturing International Corporation (SMIC) ====== | + | Has several fill patterns, second metal down is somewhat visible |
| - | Processes | + | ====== Routing ====== |
| - | * 350 nm to 45nm | + | ===== Power ===== |
| - | Foundries | + | ===== Cell ===== |
| - | * 300mm wafer fabrication facility (fab) and three 200mm wafer fabs in its Shanghai (Mega-fab) | ||
| - | * Two 300mm wafer fabs in its Beijing (Mega-fab) | ||
| - | * 200mm wafer fab in Tianjin | ||
| - | * 200mm wafer fab under construction in Shenzhen | ||
| - | * 200mm wafer fab in Chengdu owned by Cension Semiconductor Manufacturing Corporation and managed and operated by SMIC | ||
| - | * 300mm wafer fab in Wuhan owned by Wuhan Xinxin Semiconductor Manufacturing Corporation and managed and operated by SMIC | ||
| + | ====== Security mesh ====== | ||
| + | Smartcard vendors are extremely secretive and competitive and the mesh patterns are all developed in house. If a device has mesh on it, a matching pattern can typically be considered a positive ID of the vendor. | ||
| - | ====== SSMC ====== | + | ===== Atmel ===== |
| - | 0.25 um - 0.14 um | + | ===== Infineon ===== |
| - | 200 mm and 300 mm wafers | + | |
| - | ====== Northrup Gruman ====== | + | ===== Renesas |
| - | Nortrup Grumman Electronic Systems (Blatimore, MD) | + | Die labeled R5H30201, found in an unlabeled QFN. |
| - | Northrup Grumman Space Technology (Redondo Beach, CA) | + | |
| - | ====== ON Semiconductor ====== | + | The mesh runs vertically and horizontally. |
| - | Processes | + | FIXME: get image rotated to canonical orientation on an edge of the die |
| - | * I3T25 @ 0.35 µm | + | |
| - | * I3T50 @ 0.35 µm | + | |
| - | * I3T80 @ 0.35 µm | + | |
| - | * C5F/C5N @ 0.50 µm | + | |
| - | * I2T100 @ 0.70 µm | + | |
| - | * I2T30 @ 0.70 µm | + | |
| - | ====== Peregrine ====== | + | {{: |
| - | Processes | + | {{: |
| - | * GA @ 0.25 µm | + | ===== ST ===== |
| - | * GC @ 0.25 µm | + | |
| - | * FA @ 0.50 µm | + | |
| - | * FC @ 0.50 µm | + | |
| - | ====== Rayethon RF Components ====== | + | ST7 series smartcard, origin unknown. The mesh runs at a 45 degree angle to the vertical axis of the chip and consists of two conductors. |
| - | Andower, MA | + | This is one of the few images we have taken with a SEM rather than a light microscope because they' |
| - | ====== SAMSUN Semiconductor ====== | + | The sample was not sputter-coated with anything conductive and had severe charging problems, this was the only image I got that was useful. |
| - | Processes | + | FIXME: get image rotated into canonical orientation on an edge of the die |
| - | * 90 nm | + | |
| - | * 65 nm | + | |
| - | * 45 nm | + | |
| - | * 45/40nm | + | |
| - | * 32/28nm | + | |
| - | 300 mm wafers | + | {{: |
| - | ====== Sarnoff Corporation ====== | + | ===== Xilinx |
| - | Princeton, NJ | + | XC6SLX4 (45nm Samsung process). Damage to passivation was from overly aggressive cleaning. |
| - | ====== Semiconductor Manufacturing International Corporation (SMIC) ====== | + | {{: |
| - | 0.35 um to 90nm | + | ====== Test patterns ====== |
| - | ====== Taiwan Semiconductor Manufacturing Company Limited (TSMC) ====== | + | Test patterns and alignment marks are often very fab or vendor specific. |
| - | Produces ICs for many third parties include such large organizations as nVidia. | + | ====== Misc ====== |
| - | TODO: image some nVidia chips to see if we can capture some identifying marks. | + | |
| - | Processes | + | |
| - | * CLN40/CMN40 @ 40 nm | + | |
| - | * CLN45/CMN45 @ 45 nm | + | |
| - | * CLN65/CMN65 @ 65 nm | + | |
| - | * CLN90/CMN90 @ 90 nm | + | |
| - | * CL013/CM013 @ 0.13 µm | + | |
| - | * CL013LP @ 0.13 µm | + | |
| - | * CL013LV @ 0.13 µm | + | |
| - | * CL018/CM018 @ 0.18 µm | + | |
| - | * CL018HV @ 0.18 µm | + | |
| - | * CL018LP @ 0.18 µm | + | |
| - | * CL018LV @ 0.18 µm | + | |
| - | * CL025/CM025 @ 0.25 µm | + | |
| - | * CL035/CM035 @ 0.35 µm | + | |
| - | * CL035HV_BCD @ 0.35 µm | + | |
| - | * CL035HV_DDD @ 0.35 µm | + | |
| - | * "65 nm, 90 nm, 0.13um, 0.15 / 0.18 µm, 0.22 / 0.25µm, 0.30 / 0.35µm, 0.5 µm" | + | |
| - | ====== Texas Instruments (TI) ====== | + | ===== SandForce SF-2281VB1-SDC |
| - | Processes | + | {{: |
| - | * 32 nm | + | |
| - | * 45 nm | + | |
| - | * 90 nm | + | |
| - | * 130 nm | + | |
| - | * 200 mm wafers | + | |
| - | ====== TowerJazz ====== | ||
| - | |||
| - | Israel: 6” and 8” | ||
| - | |||
| - | US: 8” | ||
| - | |||
| - | China " | ||
| - | |||
| - | " | ||
| - | |||
| - | ====== TriQuint Semiconductor ====== | ||
| - | |||
| - | TriQuint Semiconductor Texas (Richardson, | ||
| - | |||
| - | ====== United Microelectronic Corporation (UMC) ====== | ||
| - | |||
| - | Processes | ||
| - | * 28 nm | ||
| - | * 40 nm | ||
| - | * 65 nm | ||
| - | * 90 nm | ||
| - | * 0.13 um | ||
| - | * 0.15 um | ||
| - | * 0.18 um | ||
| - | * 0.25 um | ||
| - | * 0.35 um | ||
| - | * 0.5 um | ||
| - | * 0.6 um | ||
| - | * 8" wafers | ||
| - | |||
| - | ====== Vanguard International Semiconductor Corporation (VIS) ====== | ||
| - | |||
| - | 0.18um to 0.5um | ||
| - | |||
| - | 8" wafers | ||
| - | |||
| - | ====== X-FAB Semiconductor Foundries ====== | ||
| - | |||
| - | "CMOS; 1.0 - 0.18 µm modular mixed-signal CMOS technologies. BiCMOS; 0.6 µm technology. SOI-CMOS; 0.6 µm & 1.0 µm CMOS and BCD technology on SOI substrates. MEMS Technologies. CUSP" | ||
| ====== References ====== | ====== References ====== | ||
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| - | | + | - http:// |
| - | 2. http:// | + | |
| - | 3. http:// | + | |
| - | 4. http:// | + | |
| - | 5. http:// | + | |
| - | 6. http:// | + | |
| - | 7. http:// | + | |
| - | 8. http:// | + | |
| - | 9. http:// | + | |
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| - | 20. http:// | + | |
| - | 21. http:// | + | |
foundry/start.1329600004.txt.gz · Last modified: 2013/01/22 05:38 (external edit)
