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foundry:start [2013/12/27 23:20] – azonenbergfoundry:start [2025/11/17 23:53] (current) – mcmaster
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 A foundry is an IC fabrication facility. A foundry is an IC fabrication facility.
 +
 +This page lists all known foundries regardless of whether they are internal-only or offer their services to the public.
  
 ====== List of foundries ====== ====== List of foundries ======
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 {{topic>foundry}} {{topic>foundry}}
  
-====== SSMC ======+====== Foundry ID (FIXME: clean up) ====== 
 + 
 +Device vendors concerned about reverse engineering often use simple tricks to make it harder to put a BOM together. One of these is to remove the labeling from, or even re-label with a laser engraver, various ICs on the board. Re-labeling can also be done for brand reasons. 
 + 
 +The first step in identifying an unknown components is to determine the vendor. If there's no logo on the die this can be difficult, but fab processes vary enough from vendor to vendor that some hints can be gained just by looking at the die structure. 
 + 
 +This page is a library of specific process examples, not a place to discuss general fabrication techniques. General fab topics belong on the [[siliconprawn>process_tech|process technology]] page. 
 + 
 +====== CMP fill ====== 
 + 
 +Although only present on smaller (<=350nm typically) process technology, CMP fill patterns are distinctive enough that a pretty good guess of the vendor can sometimes be obtained from the fill pattern alone. 
 + 
 +All images shown are top metal with overglass intact, unless otherwise labeled. 
 + 
 +Please try to include scale bars in all images. 
 +===== Actel ===== 
 + 
 +{{:mcmaster:foundry:actel_a54sx32a_mit20x.jpg?500|}} 
 + 
 +===== Adaptec ===== 
 + 
 +{{:mcmaster:foundry:adaptec:7902:ns50xu_0.jpg?500|}} 
 + 
 +===== ATI radeon ===== 
 + 
 +{{:mcmaster:foundry:ati_radeon_probably_mit20x.jpg?500|}} 
 + 
 +===== Atmel ===== 
 + 
 +==== 350nm aluminum ==== 
 + 
 +FIXME: get a picture with a scale bar 
 + 
 +The fill pattern is very distinctive and looks like a "brick wall" - short lines staggered every other row. 
 + 
 +{{:protected:vendorid:flylogic-atmel-350nm-cmpfill.jpg?500|}} 
 + 
 +(image copyright Christopher Tarnovsky, originally published on [[http://www.flylogic.net/blog/?p=23|Flylogic blog]], used with permission) 
 + 
 +===== Cisco Systems ===== 
 + 
 +{{:mcmaster:foundry:cisco_ibm_100x.jpg?500|}} 
 + 
 +IBM logo on chip. Am100x objective? 
 + 
 +===== FTDI ===== 
 + 
 +{{:protected:vendorid:ft232rl_15_bf_neo40x_annotated.jpg?500|}} 
 + 
 +===== Microchip ===== 
 + 
 +==== 350nm aluminum ==== 
 + 
 +Example image from PIC12F683. Overglass generally appears deep red to orange, CMP fill is long straight lines. 
 + 
 +{{:protected:vendorid:microchip-350nm-cmpfill.jpg?500|}}  
 + 
 +==== 250nm copper ==== 
 + 
 +The exact geometry of this process isn't known but it's copper damascene and significantly smaller than the 350. 
 + 
 +Example image from ENC424J600. Overglass appears orange to yellow. CMP fill is short lines. 
 + 
 + 
 +{{:protected:vendorid:microchip-250nm-cmpfill.jpg?500|}} 
 + 
 +==== pic32mx695f ==== 
 + 
 +{{:mcmaster:foundry:pic32mx695f_512h-80ip_mit20x.jpg?500|}} 
 + 
 +===== Myricom ===== 
 + 
 +{{:mcmaster:foundry:myricom_not_crossbar.jpg?500|}} 
 + 
 +===== NXP / Philips =====
  
-0.25 um - 0.14 um +==== Unknown geometry, possibly 220nm ====
-200 mm and 300 mm wafers+
  
-====== Northrup Gruman ======+Fill pattern is large square patches of metal with spaces between them.
  
-Nortrup Grumman Electronic Systems (Blatimore, MD) +{{:protected:vendorid:nxp-250nm-cmpfill.jpg?500|}}
-Northrup Grumman Space Technology (Redondo Beach, CA)+
  
-====== Peregrine ======+===== Sysmocom =====
  
-Processes +{{:mcmaster:foundry:sysmocom.jpg?500|}}
-  * GA @ 0.25 µm +
-  * GC @ 0.25 µm +
-  * FA @ 0.50 µm +
-  * FC @ 0.50 µm+
  
-====== Rayethon RF Components ======+Has several fill patterns, second metal down is somewhat visible
  
-Andower, MA+====== Routing ======
  
-====== SAMSUN Semiconductor ======+===== Power =====
  
-Processes +===== Cell =====
-  * 90 nm +
-  * 65 nm +
-  * 45 nm +
-  * 45/40nm +
-  * 32/28nm+
  
-300 mm wafers 
  
-====== Sarnoff Corporation ======+====== Security mesh ======
  
-Princeton, NJ+Smartcard vendors are extremely secretive and competitive and the mesh patterns are all developed in house. If a device has mesh on it, a matching pattern can typically be considered a positive ID of the vendor.
  
-====== Semiconductor Manufacturing International Corporation (SMIC) ======+===== Atmel =====
  
-0.35 um to 90nm+===== Infineon =====
  
-====== Taiwan Semiconductor Manufacturing Company Limited (TSMC) ======+===== Renesas =====
  
-Produces ICs for many third parties include such large organizations as nVidia. +Die labeled R5H30201, found in an unlabeled QFN. 
-TODO: image some nVidia chips to see if we can capture some identifying marks. +
-Processes +
-  * CLN40/CMN40 @ 40 nm +
-  * CLN45/CMN45 @ 45 nm +
-  * CLN65/CMN65 @ 65 nm +
-  * CLN90/CMN90 @ 90 nm +
-  * CL013/CM013 @ 0.13 µm +
-  * CL013LP @ 0.13 µm +
-  * CL013LV @ 0.13 µm +
-  * CL018/CM018 @ 0.18 µm +
-  * CL018HV @ 0.18 µm +
-  * CL018LP @ 0.18 µm +
-  * CL018LV @ 0.18 µm +
-  * CL025/CM025 @ 0.25 µm +
-  * CL035/CM035 @ 0.35 µm +
-  * CL035HV_BCD @ 0.35 µm +
-  * CL035HV_DDD @ 0.35 µm +
-  * "65 nm, 90 nm, 0.13um, 0.15 / 0.18 µm, 0.22 / 0.25µm, 0.30 / 0.35µm, 0.5 µm"+
  
-{{topic>foundry_tsmc}}+The mesh runs vertically and horizontally.
  
-====== Texas Instruments (TI) ======+FIXME: get image rotated to canonical orientation on an edge of the die
  
-Processes +{{:protected:vendorid:renesas-mesh.jpg?500|}}
-  * 32 nm +
-  * 45 nm +
-  * 90 nm +
-  * 130 nm +
-  * 200 mm wafers+
  
-====== TowerJazz ======+{{:drm:renesas:r5h30201_1000x_20kv_19mm_6e-09a_se_18.jpg?500|}} 
 +===== ST =====
  
-Israel: 6” and 8”+ST7 series smartcard, origin unknown. The mesh runs at a 45 degree angle to the vertical axis of the chip and consists of two conductors. 
  
-US: 8”+This is one of the few images we have taken with a SEM rather than a light microscope because they're expensive to get time on. I (azonenberg) was imaging some MEMS prototypes on a Zeiss Supra 55 in the RPI cleanroom for a customer and decided to buy an extra hour of scope time out of my own pocket while I was in the lab.
  
-China "manufacturing partnerships"+The sample was not sputter-coated with anything conductive and had severe charging problems, this was the only image I got that was useful.
  
-"silicon germanium (SiGe) bipolar complementary metal-oxide semiconductor (BiCMOS), silicon BiCMOS, digital CMOS, analog CMOS and RF CMOS technologies"+FIXME: get image rotated into canonical orientation on an edge of the die
  
-====== TriQuint Semiconductor ======+{{:protected:vendorid:st7-mesh.jpg?500|}}
  
-TriQuint Semiconductor Texas (Richardson, TX)+===== Xilinx =====
  
-====== United Microelectronic Corporation (UMC) ======+XC6SLX4 (45nm Samsung process). Damage to passivation was from overly aggressive cleaning.
  
-Processes +{{:azonenberg:foundry:xilinx:xc6slx4_24_bf_neo40x_annotated.jpg?500|}}
-  * 28 nm +
-  * 40 nm +
-  * 65 nm +
-  * 90 nm +
-  * 0.13 um +
-  * 0.15 um +
-  * 0.18 um +
-  * 0.25 um +
-  * 0.35 um +
-  * 0.5 um +
-  * 0.6 um +
-  * 8" wafers+
  
-{{topic>foundry_umc}}+====== Test patterns ======
  
-====== Vanguard International Semiconductor Corporation (VIS) ======+Test patterns and alignment marks are often very fab or vendor specific.
  
-0.18um to 0.5um+====== Misc ======
  
-8" wafers+===== SandForce SF-2281VB1-SDC =====
  
-====== X-FAB Semiconductor Foundries ======+{{:mcmaster:foundry:sandforce_sf-2281vb1-sdc.jpg?500|}}
  
-"CMOS; 1.0 - 0.18 µm modular mixed-signal CMOS technologies. BiCMOS; 0.6 µm technology. SOI-CMOS; 0.6 µm & 1.0 µm CMOS and BCD technology on SOI substrates. MEMS Technologies. CUSP" 
  
 ====== References ====== ====== References ======
  
 +  - http://smithsonianchips.si.edu/ice/cd/PROF98/JAPAN.PDF
   - http://www.mosis.com/products/fab/schedule/   - http://www.mosis.com/products/fab/schedule/
   - http://www.jazzsemi.com/fact-sheets.html   - http://www.jazzsemi.com/fact-sheets.html
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   - http://www.hjtc.com.cn/aboutHJ/PressRelease.asp   - http://www.hjtc.com.cn/aboutHJ/PressRelease.asp
   - http://www.hhnec.com/EN/Technology/index.aspx   - http://www.hhnec.com/EN/Technology/index.aspx
-  - http://www.ssmc.com.sg/technology_portfolio.asp 
   - http://www.ti.com/research/docs/TI_ManufacturingStrategy_WP.pdf   - http://www.ti.com/research/docs/TI_ManufacturingStrategy_WP.pdf
-  - http://www.magnachip.com/eng/product/foundry/proc_portfolio.jsp 
  
foundry/start.1388186450.txt.gz · Last modified: 2013/12/27 23:20 by azonenberg